1. Field of the Invention
The invention relates to semiconductor device that includes a semiconductor chip for power supply, specifically to a wiring structure of the device for external connection.
2. Description of the Related Art
Conventional power supply semiconductor devices are described, for example, in Japanese Laid-Open Patent Publication No. Hei 5-206449. As described in the publication, conventional power supply semiconductor devices relies on switching chips of standard size. To meet a specific current capacity requirement for an application of the device, the standard-size switching chips are connected in parallel to fabricate the power supply semiconductor device.
Now, referring to FIG. 12 through FIG. 14, an example of the configuration of the conventional power supply semiconductor device is briefly explained below. Here, description on the operation circuit of this semiconductor device are found in the aforementioned publication. FIG. 12 is a plan view of the semiconductor device. FIG. 13 is a cross-sectional view along line Axe2x80x94A of FIG. 12. FIG. 14 is a cross-sectional view along line Bxe2x80x94B of FIG. 12.
A second electrode plate 3 is formed around the edge portions of a rectangular first electrode plate 1 made of copper, and is disposed on the first electrode plate 1 through an insulating plate 2 made of an insulating material such as alumina. On the center of the first electrode plate 1, a third electrode plate 5 is formed. The third electrode plate 5 is disposed through an insulating plate 4 made of a material such as alumina, and formed in the shape of a stripe which is aligned parallel with two of the sides of the second electrode plate 3 formed on the first electrode plate. Furthermore, a buffer plate 6 is formed on the first electrode plate 1 away from the second electrode plate 3 and the third electrode plate 5 to surround the third electrode plate 5. The buffer plate 6 is made of a metal, such as molybdenum, having a thermal expansion coefficient that is approximately equal to that of a semiconductor.
Furthermore, three rectangular IGBT (Insulated Gate Bipolar Transistor) chips 7 are fixed on the buffer plate 6 in each of the two rows, as shown in FIG. 12. Two rectangular diode chips 8 are fixed near the comers of the buffer plate 6. The IGBT chip 7 has a pair of principal surfaces, with a collector electrode 9 provided on one principal surface, and emitter electrodes 10 and a gate electrode 11 provided on the other principal surface. The collector electrode 9 is disposed so as to face the buffer plate 6. On the other hand, the diode chip 8 has a pair of principal surfaces, with an anode electrode 12 provided on one principal surface and a cathode electrode 13 provided on the other principal surface. The cathode electrode 13 is disposed so as to face the buffer plate 6.
The emitter electrodes 10 on the IGBT chips 7 are electrically connected to the second electrode plate 3 with bonding wires 14. The gate electrode 11 on the IGBT chip 7 is connected to the third electrode plate 5 with the bonding wires 14. The anode electrode 12 on the diode chips 8 is connected to the second electrode plate 3 with bonding wires 15. The semiconductor device further includes an adhesive layer 16 formed of a material such as solder, a first lead terminal 17, a second lead terminal 18, and a third lead terminal 19. These lead terminals may be integrated with the electrode plates, or they may be separately provided to combine with the corresponding electrode plates.
As described above, the conventional power supply semiconductor device is configured such that the emitter electrodes 10 on the IGBT chips 7 are connected to the second electrode plate 3 with bonding wires 14. Because many emitter electrodes 10 are formed on the IGBT chips 7, the bonding wire 14 must be connected to each of the emitter electrodes 10. Likewise, a multiple wire bonding must be performed for each of the anode electrodes 12. It should be note that the semiconductor device can provide various functions by changing the number of IGBT chips 7 and diode chips 8 that is uses.
In this configuration, to supply uniform current to the emitter region, the number of the bonding wires 14 must be the same as that of the emitter electrodes 10. Accordingly, boding must be repeated the number of times equal to the number of the bonding wires 14. For this reason, the wire bonding process needs a long process period, thus making this process inefficient.
Furthermore, to connect a plurality of emitter electrodes 10 on the IGBT chips 7 to the second electrode plate 3 with the bonding wires 14, wire bonding with beat and pressure or with ultrasonic wave must be performed. During such a bonding procedure, vibrations inevitably occur at the IGBT chips 7, thereby asserting mechanical stresses on the chips 7. As a result, repeating the bonding procedure multiple times on the same chip induces crack formation in interlayer insulating films made of a material such as silicon oxide.
The invention provides a semiconductor device including a semiconductor chip that has an electrode disposed on a primary surface of the semiconductor chip and an insulating layer disposed on the primary surface and covering a part of the electrode. The devise also includes an electrically conductive plate soldered on a part of the electrode that is not covered by the insulating layer, an electrically conductive region for external electrical connection that is disposed outside the semiconductor chip, and a conductive wire electrically connecting the electrically conductive plate and the electrically conductive region.
The invention also provides a semiconductor device including a semiconductor chip that has a current passing electrode and a control electrode each disposed on a primary surface of the semiconductor chip, and an insulating layer disposed on the primary surface and covering a part of the current passing electrode. The device also includes an electrically conductive plate soldered on a part of the current passing electrode that is not covered by the insulating layer, an electrically conductive region for external electrical connection that is disposed outside the semiconductor chip and a conductive wire electrically connecting the electrically conductive plate and the electrically conductive region.
The invention further provides a semiconductor device including a semiconductor chip that has a plurality of current passing electrodes and a plurality of control electrodes. Each of the current passing electrodes and the control electrodes is disposed on a primary surface of the semiconductor chip. The chip also includes an insulating layer disposed on the primary surface and covering a part of each of the current passing electrodes and the control electrodes. The device further includes a first electrically conductive plate soldered on a part of each of the current passing electrodes, which is not covered by the insulating layer, and a second electrically conductive plate soldered on a part of each of the control electrodes, which is not covered by the insulating layer. The device also includes a first and second electrically conductive regions for external electrical connection that are disposed outside the semiconductor chip, and a plurality of first and second conductive wires electrically connecting the first and second electrically conductive plates to the first and second electrically conductive regions.
The invention also provides a semiconductor device for use with an external device. The semiconductor device includes a semiconductor chip comprising an electrode disposed on a primary surface of the semiconductor chip and an insulating layer disposed on the primary surface and covering a part of the electrode, an electrically conductive plate soldered on a part of the electrode that is not covered by the insulating layer, and an electrically conductive wire. One end of the electrically conductive wire is fixed on the electrically conductive plate and another end of the electrically conductive wire is fixed on an electrically conductive portion of the external device.